| ID | | Article Title | Post Date |
|
814 | 
| I'm getting low throughput on macOS. How can I fix this? | May-26-22 |
|
976 |
| In a Mac Pro, the SSDs are seen as external drives, how do I prevent accidental ejects? | Feb-14-23 |
|
1069 |
| How do I configure RAID under Windows 10? | Feb-14-23 |
|
1073 |
| How do I configure RAID under macOS? | Feb-14-23 |
|
1077 | 
| Programming SSDs to 4k Block Size for Compatibility With macOS 10.13.6 | Feb-08-23 |
| macOS 10.14.6 supports both 512 and 4k block size SSDs, but macOS 10.13.6 supports only 4k block size SSDs. Today, most SSDs are shipped from the factory programmed with a 4k block size. If your SSDs are programmed with 512 block size, however, and you need to be compatible with macOS 10.13.6, you must reprogram your SSDs to a 4k block size. Sonnet has written a script to do this, but it needs to be run on a Linux computer. You can download the instructions here. For a copy of the script, contact support@sonnettech.com. |
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|
1122 |
| Thunderbolt 3 NVMe volumes may experience a stop error under Windows 10 version 20H2 | Feb-14-23 |
|
1136 |
| How can I use my new SSD volume to hold my user folder on macOS? | Feb-14-23 |
|
1183 |
| The Write performance of my SSD is very slow under Windows. | Feb-14-23 |
|
1189 |
| The x8 PCIe lanes can deliver up to 7.8 GB/s. How do you fit the RAID, the 10gig lan and the 2x USB 3.2 in this bandwidth? | Jun-08-22 |
| The most important design feature is that every device is connected at its maximum PCIe 3.0 lanes: each SSD@x4; USB 3.2@x2; and 10GbE@x2, which gives each device its maximum usable bandwidth: SSD@3.5 GB/s x2; USB 3.2@1.0 GB/s x2; and 10GbE@1.0GB/s. Adding up the total bandwidth is indeed greater than 7.8GB/s, but considering that PCIe input and output bandwidth are independent, one can achieve the full 11MB/s bandwidth of simultaneous use of the devices as long as there is a mix of reading and writing. It is extremely unlikely that one would need to use all the ports simultaneously, at full bandwidth, and all writing-or all reading. The alternative of a larger PCIe bridge chip to connect to the computer at x16 would have increased the cost of the McFiver, without any performance gain in virtually any practical use scenario. |
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